Generally, I/O pads (a.k.a. pads) of semiconductor chips are configured to operate in a voltage domain of higher voltage range commonly referred to as pad voltage domain. Core circuitry of semiconductor chips are configured to operate in voltage domains of lower voltage range, commonly referred to as core voltage domains. Further, many semiconductor chips support multiple core voltage domains, some of which are collapsible during low power mode, while others remain on. As such, input/output (I/O) architecture of semiconductor chip are typically designed to provide an interface that supports routing and processing signals in both pad voltage domain and core voltage domains.